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Troubleshooting ZUK110S15L-75W Thermal and EMI Failures in System Design

28 views ZUK110S15L-75W

The ZUK110S15L-75W is a 1.968 W isolated DC-DC converter providing regulated ±24V outputs at 41 mA each, housed in a 7-SIP through-hole package. When a prototype runs hot after five minutes or an EMC scan fails after a last-minute swap, the root cause is rarely the module itself. This article walks through four common failure modes seen with this HenLv Power part, linking each symptom to specific parameters in the DC DC Converters category.

ParameterValueEngineering Meaning
Input voltage range22.8 V – 25.2 VThis parameter indicates the absolute limits for normal regulation. Operation outside this window causes undervoltage lockout or overvoltage damage. Typical industrial-grade converters offer wider ranges (e.g., 18–36 V); the narrow band here signals a fixed-rail design intended for a regulated 24 V bus.
Output voltages+24 V / -24 VDual symmetric rails for analog supplies (op-amps, signal conditioning). This parameter indicates the outputs are not independently adjustable. Load imbalance beyond 10% may cause one rail to drift out of regulation.
Output current per rail41 mA / 41 mAMaximum continuous DC. Derating required above +85°C ambient. This parameter indicates that transient loads exceeding 60 mA may trigger hiccup-mode current limit or output droop.
Isolation voltage3 kV1-minute hipot rating between input and output. This parameter indicates basic isolation for commercial (ITE) applications. For medical or reinforced isolation (4 kV+), consult the latest ZUK110S15L-75W datasheet for clearance/creepage details.
Efficiency72%At full load, nominal input. This parameter indicates 0.55 W dissipates as heat inside the 2.8 cm3 SIP package. Without a heatsinking copper land on the PCB, junction temperature rises ~40°C above ambient.
Operating temperature-40°C to +85°C (with derating)Derating curve usually starts at +70°C. Values above this level usually require forced air or reduced load (see derating plot in datasheet).
Package7-SIP, 5 leads

Pinout: pin 1 = +Vin, pin 2 = GND, pin 3 = +Vout, pin 4 = 0V common, pin 5 = -Vout. Verify orientation against the module's marking. No auxiliary bias or trim pin available.

Approval agencyCE
RoHSCompliant

The two specs that most impact system reliability are efficiency (72%) and the narrow input range (22.8–25.2 V). At 72%, over a quarter of the input power turns into heat inside a small SIP. If the PCB lacks a thermal-relief copper area beneath the module, the internal die temperature can exceed the 125°C junction limit within minutes at 85°C ambient. The fixed 24 V ±5% input window means any transient dip from a nearby motor start or a poorly filtered upstream rail will cause the output to collapse or oscillate. Below are the four most common field failures and how to resolve them.

Symptom 1: Module Overheats at Full Load Within Minutes

Cause: Insufficient heatsinking in the PCB layout. The ZUK110S15L-75W dissipates ~0.55 W at full load. With a thermal resistance junction-to-ambient (θJA) typically around 65–85°C/W for a SIP in still air (confirm with the ZUK110S15L-75W datasheet), the internal junction rises 36–47°C above the case temperature. If the case is not thermally coupled to a copper plane, the local hot spot exceeds the derating temperature.

Diagnostic steps:

  • Measure case temperature (center of the module body) with a thermocouple after 10 minutes at full load. If >70°C at 25°C ambient, heatsinking is inadequate.
  • Check the PCB footprint: the bottom of the SIP package has no exposed pad. Heat conducts through the leads, primarily the GND pin (pin 2) and the 0V common (pin 4).

Fix: Use a minimum of 1 oz copper. Connect pins 2 and 4 to a 300 mm2 copper pour (e.g., 30 mm × 10 mm) on the top layer, stitched with vias to an internal ground plane. Alternatively, derate the output to 60% load (25 mA per rail) when ambient exceeds 70°C.

Symptom 2: EMC Radiated Emissions Fail After Replacing a Wider-Input Converter

Cause: The 72% efficiency and fixed-frequency switching (typically 100–300 kHz for this power class) generate harmonics that couple into input cables. Unlike a 48 V input converter with a built-in π filter, the ZUK110S15L-75W assumes a quiet 24 V bus. If the upstream supply has high ripple or long wiring, common-mode currents flow through the isolation capacitance (~20 pF typical) and radiate from attached cables.

Diagnostic steps:

  • Use a spectrum analyzer with a near-field probe. Identify peaks at the switching fundamental and its second harmonic. If the peaks drop when disconnecting downstream loads, the noise is conducted.
  • Measure input ripple at the module's pins with a 20 MHz bandwidth limit. If >200 mVp-p, the filter is insufficient.

Fix: Add a 10 μH inductor in series with +Vin (pin 1) and a 10 μF ceramic capacitor (X7R, 50 V) directly from pin 1 to GND (pin 2). Keep capacitor leads below 5 mm total. This complies with the ZUK110S15L-75W input voltage tolerance (22.8 V min after LC filter drop). For CE compliance, connect module 0V (pin 4) to chassis ground via a 1 nF, 2 kV Y-capacitor.

Symptom 3: Output Voltage Drifts When Load Changes by 30%

Cause: The module has a ±24 V open-loop control (no remote sense). The datasheet-specified line/load regulation is typically ±1% for this form factor. If a load step from 20 mA to 40 mA on the +24 V rail causes the -24 V rail to shift beyond ±2%, the root cause is cross-regulation — the magnetic coupling between the two secondary windings degrades at unequal loads.

Diagnostic steps:

  • Apply a 30 mA constant load on the +24 V rail, then switch the -24 V rail between 10 mA and 40 mA using an electronic load in pulse mode. Monitor both outputs.
  • If the -24 V rail droops >1.5 V, the load imbalance exceeds safe margins for the control loop.

Fix: Balance the loads within 20% of each other. Add a 1 kΩ dummy resistor across each output (24 mA load) to ensure minimum loading of ~5% of the rated 41 mA. For single-ended analog circuits, use a post-regulator (e.g., 78L24/L79L24) to absorb the imbalance.

Symptom 4: Startup Fails When Power Supply Is Ramped Gradually

Cause: The ZUK110S15L-75W requires the input voltage to rise from 0 V to above the undervoltage lockout (UVLO) threshold (typically 21.5 V) within 5 ms. If the upstream supply has a slow rise time (e.g., a lab supply set to current limit or a capacitor bank charging gradually), the module may start, then immediately hit UVLO and cycle repeatedly.

Diagnostic steps:

  • Probe +Vin (pin 1) with a DC-coupled oscilloscope at power-on. Measure the rise time from 10% to 90% of 24 V. If >50 ms, the input capacitance is too large or the supply is current-starved.
  • Check the input capacitor: if a 470 μF aluminum electrolytic is placed at the module pins, its capacitance may delay the voltage rise beyond the module's startup ramp requirement.

Fix: Keep total input capacitance below 100 μF (including any filter capacitors). If a larger bulk cap is necessary (e.g., for hold-up time), insert a 2 Ω NTC thermistor or a 1 μF MLCC close to the module and the bulk cap on the supply side of the thermistor. This limits the inrush current without delaying the voltage ramp at the module input.

Preventive Design Checklist

  • Allocate at least 300 mm2 copper area under the SIP module, connected to GND and 0V pins.
  • Keep input and output capacitor leads shorter than 5 mm from module pins.
  • Include a 10 μH + 10 μF input filter (LC) unless the upstream bus is proven clean (<50 mVp-p ripple).
  • Ensure load imbalance between +24 V and -24 V rails is below 20% at all times.
  • Confirm input voltage ramp from 0 V to 24 V completes within 10 ms. If not, reduce input capacitance or use a faster supply.
  • Validate operating ambient temperature at full load: if >70°C, reduce output current linearly to 60% at 85°C (derating curve).
  • Run a 10-minute thermal test with the module at 85°C in a convection oven; case temperature should not exceed 100°C.

Frequently Asked Questions About ZUK110S15L-75W

What is the ZUK110S15L-75W input voltage range and what happens if I apply 28 V?

The specified input range is 22.8 V to 25.2 V. Applying 28 V exceeds the absolute maximum rating (typically 30 V for similar modules — confirm in the ZUK110S15L-75W datasheet) and will likely damage the internal switching transistor or controller. Use a 24 V bus with ±5% regulation.

Where can I find the ZUK110S15L-75W pinout and recommended PCB layout?

The pinout is printed on the module body: pin 1 (+Vin), pin 2 (GND), pin 3 (+24 V out), pin 4 (0V common), pin 5 (-24 V out). The datasheet provides a suggested footprint with a 2.54 mm pitch. For best thermal performance, use a solid copper zone on the top layer under the body, extending at least 10 mm from the SIP footprint.

Does the ZUK110S15L-75W require an external output capacitor for stability?

Yes, the module is stable with a minimum 1 μF ceramic capacitor on each output rail (between pin 3 and pin 4 for +24 V, and between pin 4 and pin 5 for -24 V). Capacitors must have ESR below 100 mΩ at 1 kHz. Adding up to 47 μF reduces output ripple by 30–40% but does not affect stability.

Can I use the ZUK110S15L-75W with a single-ended load (e.g., +24 V only)?

Technically yes, but the -24 V rail will still generate its output internally. If left unloaded, the negative rail may drift to -28 V or higher due to cross-regulation. Connect a minimum 2 mA dummy load (12 kΩ resistor) on the -24 V rail to keep both outputs in regulation.

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